tools/perf/pmu-events/arch/x86/grandridge/uncore-cache.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/grandridge/uncore-cache.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/grandridge/uncore-cache.json
Extension
.json
Size
84257 bytes
Lines
2118
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "BriefDescription": "Clockticks for CMS units attached to CHA",
        "Counter": "0,1,2,3",
        "EventCode": "0x01",
        "EventName": "UNC_CHACMS_CLOCKTICKS",
        "PerPkg": "1",
        "PortMask": "0x000",
        "Unit": "CHACMS"
    },
    {
        "BriefDescription": "Counts the number of cycles FAST trigger is received from the global FAST distress wire.",
        "Counter": "0,1,2,3",
        "EventCode": "0x34",
        "EventName": "UNC_CHACMS_RING_SRC_THRTL",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "Unit": "CHACMS"
    },
    {
        "BriefDescription": "Number of CHA clock cycles while the event is enabled",
        "Counter": "0,1,2,3",
        "EventCode": "0x01",
        "EventName": "UNC_CHA_CLOCKTICKS",
        "PerPkg": "1",
        "PublicDescription": "Clockticks of the uncore caching and home agent (CHA)",
        "Unit": "CHA"
    },
    {
        "BriefDescription": "Distress signal assertion for dynamic prefetch throttle (DPT).  Threshold for distress signal assertion reached in TOR or IRQ (immediate cause for triggering).",
        "Counter": "0,1,2,3",
        "EventCode": "0x59",
        "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_ANY",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x3",
        "Unit": "CHA"
    },
    {
        "BriefDescription": "Distress signal assertion for dynamic prefetch throttle (DPT).  Threshold for distress signal assertion reached in IRQ (immediate cause for triggering).",
        "Counter": "0,1,2,3",
        "EventCode": "0x59",
        "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_IRQ",
        "PerPkg": "1",
        "UMask": "0x1",
        "Unit": "CHA"
    },
    {
        "BriefDescription": "Distress signal assertion for dynamic prefetch throttle (DPT).  Threshold for distress signal assertion reached in TOR (immediate cause for triggering).",
        "Counter": "0,1,2,3",
        "EventCode": "0x59",
        "EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_TOR",
        "PerPkg": "1",
        "UMask": "0x2",
        "Unit": "CHA"
    },
    {
        "BriefDescription": "Counts when a normal (Non-Isochronous) full line write is issued from the CHA to the any of the memory controller channels.",
        "Counter": "0,1,2,3",
        "EventCode": "0x5b",
        "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL",
        "Experimental": "1",
        "PerPkg": "1",
        "UMask": "0x1",
        "Unit": "CHA"
    },
    {
        "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Full Line : Counts the total number of full line writes issued from the HA into the memory controller.",
        "Counter": "0,1,2,3",

Annotation

Implementation Notes