tools/perf/pmu-events/arch/x86/icelake/other.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/icelake/other.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/icelake/other.json
Extension
.json
Size
2359 bytes
Lines
50
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.",
        "Counter": "0,1,2,3",
        "EventCode": "0x28",
        "EventName": "CORE_POWER.LVL0_TURBO_LICENSE",
        "PublicDescription": "Counts Core cycles where the core was running with power-delivery for baseline license level 0.  This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes.",
        "SampleAfterValue": "200003",
        "UMask": "0x7"
    },
    {
        "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX2 turbo schedule.",
        "Counter": "0,1,2,3",
        "EventCode": "0x28",
        "EventName": "CORE_POWER.LVL1_TURBO_LICENSE",
        "PublicDescription": "Counts Core cycles where the core was running with power-delivery for license level 1.  This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions.",
        "SampleAfterValue": "200003",
        "UMask": "0x18"
    },
    {
        "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX512 turbo schedule.",
        "Counter": "0,1,2,3",
        "EventCode": "0x28",
        "EventName": "CORE_POWER.LVL2_TURBO_LICENSE",
        "PublicDescription": "Core cycles where the core was running with power-delivery for license level 2 (introduced in Skylake Server microarchitecture).  This includes high current AVX 512-bit instructions.",
        "SampleAfterValue": "200003",
        "UMask": "0x20"
    },
    {
        "BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that have any type of response.",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.OTHER.ANY_RESPONSE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x18000",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Counts streaming stores that have any type of response.",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OCR.STREAMING_WR.ANY_RESPONSE",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x10800",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    }
]

Annotation

Implementation Notes