tools/perf/pmu-events/arch/x86/icelakex/uncore-memory.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/icelakex/uncore-memory.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/icelakex/uncore-memory.json
Extension
.json
Size
77467 bytes
Lines
1887
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "BriefDescription": "DRAM Activate Count : All Activates",
        "Counter": "0,1,2,3",
        "EventCode": "0x01",
        "EventName": "UNC_M_ACT_COUNT.ALL",
        "PerPkg": "1",
        "PublicDescription": "DRAM Activate Count : All Activates : Counts the number of DRAM Activate commands sent on this channel.  Activate commands are issued to open up a page on the DRAM devices so that it can be read or written to with a CAS.  One can calculate the number of Page Misses by subtracting the number of Page Miss precharges from the number of Activates.",
        "UMask": "0xb",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM Activate Count : Activate due to Bypass",
        "Counter": "0,1,2,3",
        "EventCode": "0x01",
        "EventName": "UNC_M_ACT_COUNT.BYP",
        "Experimental": "1",
        "PerPkg": "1",
        "PublicDescription": "DRAM Activate Count : Activate due to Bypass : Counts the number of DRAM Activate commands sent on this channel.  Activate commands are issued to open up a page on the DRAM devices so that it can be read or written to with a CAS.  One can calculate the number of Page Misses by subtracting the number of Page Miss precharges from the number of Activates.",
        "UMask": "0x8",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "All DRAM CAS commands issued",
        "Counter": "0,1,2,3",
        "EventCode": "0x04",
        "EventName": "UNC_M_CAS_COUNT.ALL",
        "PerPkg": "1",
        "PublicDescription": "Counts the total number of DRAM CAS commands issued on this channel.",
        "UMask": "0x3f",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "All DRAM read CAS commands issued (including underfills)",
        "Counter": "0,1,2,3",
        "EventCode": "0x04",
        "EventName": "UNC_M_CAS_COUNT.RD",
        "PerPkg": "1",
        "PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issued on this channel.  This includes underfills.",
        "UMask": "0xf",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre",
        "Counter": "0,1,2,3",
        "EventCode": "0x04",
        "EventName": "UNC_M_CAS_COUNT.RD_PRE_REG",
        "Experimental": "1",
        "PerPkg": "1",
        "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre : DRAM RD_CAS and WR_CAS Commands : Counts the total number or DRAM Read CAS commands issued on this channel.  This includes both regular RD CAS commands as well as those with explicit Precharge.  AutoPre is only used in systems that are using closed page policy.  We do not filter based on major mode, as RD_CAS is not issued during WMM (with the exception of underfills).",
        "UMask": "0x2",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.",
        "Counter": "0,1,2,3",
        "EventCode": "0x04",
        "EventName": "UNC_M_CAS_COUNT.RD_PRE_UNDERFILL",
        "Experimental": "1",
        "PerPkg": "1",
        "PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS and WR_CAS Commands",
        "UMask": "0x8",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "All DRAM read CAS commands issued (does not include underfills)",
        "Counter": "0,1,2,3",
        "EventCode": "0x04",
        "EventName": "UNC_M_CAS_COUNT.RD_REG",
        "Experimental": "1",

Annotation

Implementation Notes