tools/perf/pmu-events/arch/x86/ivytown/memory.json

File Facts

System

Linux kernel

Corpus path

tools/perf/pmu-events/arch/x86/ivytown/memory.json

Extension

.json

Size

16547 bytes

Lines

424

Domain

Support Tooling And Documentation

Bucket

tools

Inferred role

Support Tooling And Documentation: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

• Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

[
    {
        "BriefDescription": "Counts the number of machine clears due to memory order conflicts.",
        "Counter": "0,1,2,3",
        "EventCode": "0xC3",
        "EventName": "MACHINE_CLEARS.MEMORY_ORDERING",
        "SampleAfterValue": "100003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "Loads with latency value being above 128",
        "Counter": "3",
        "EventCode": "0xCD",
        "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",
        "MSRIndex": "0x3F6",
        "MSRValue": "0x80",
        "PEBS": "2",
        "PublicDescription": "Loads with latency value being above 128.",
        "SampleAfterValue": "1009",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Loads with latency value being above 16",
        "Counter": "3",
        "EventCode": "0xCD",
        "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",
        "MSRIndex": "0x3F6",
        "MSRValue": "0x10",
        "PEBS": "2",
        "PublicDescription": "Loads with latency value being above 16.",
        "SampleAfterValue": "20011",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Loads with latency value being above 256",
        "Counter": "3",
        "EventCode": "0xCD",
        "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",
        "MSRIndex": "0x3F6",
        "MSRValue": "0x100",
        "PEBS": "2",
        "PublicDescription": "Loads with latency value being above 256.",
        "SampleAfterValue": "503",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Loads with latency value being above 32",
        "Counter": "3",
        "EventCode": "0xCD",
        "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",
        "MSRIndex": "0x3F6",
        "MSRValue": "0x20",
        "PEBS": "2",
        "PublicDescription": "Loads with latency value being above 32.",
        "SampleAfterValue": "100007",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Loads with latency value being above 4",
        "Counter": "3",
        "EventCode": "0xCD",
        "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",
        "MSRIndex": "0x3F6",
        "MSRValue": "0x4",
        "PEBS": "2",
        "PublicDescription": "Loads with latency value being above 4.",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {

Annotation

• Atlas domain: Support Tooling And Documentation / tools.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.