tools/perf/pmu-events/arch/x86/ivytown/virtual-memory.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/ivytown/virtual-memory.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/ivytown/virtual-memory.json
Extension
.json
Size
7390 bytes
Lines
179
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes of any page size.",
        "Counter": "0,1,2,3",
        "EventCode": "0x08",
        "EventName": "DTLB_LOAD_MISSES.DEMAND_LD_WALK_COMPLETED",
        "SampleAfterValue": "100003",
        "UMask": "0x82"
    },
    {
        "BriefDescription": "Demand load cycles page miss handler (PMH) is busy with this walk.",
        "Counter": "0,1,2,3",
        "EventCode": "0x08",
        "EventName": "DTLB_LOAD_MISSES.DEMAND_LD_WALK_DURATION",
        "SampleAfterValue": "2000003",
        "UMask": "0x84"
    },
    {
        "BriefDescription": "Page walk for a large page completed for Demand load.",
        "Counter": "0,1,2,3",
        "EventCode": "0x08",
        "EventName": "DTLB_LOAD_MISSES.LARGE_PAGE_WALK_COMPLETED",
        "SampleAfterValue": "100003",
        "UMask": "0x88"
    },
    {
        "BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes an page walk of any page size.",
        "Counter": "0,1,2,3",
        "EventCode": "0x08",
        "EventName": "DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK",
        "PublicDescription": "Misses in all TLB levels that cause a page walk of any page size from demand loads.",
        "SampleAfterValue": "100003",
        "UMask": "0x81"
    },
    {
        "BriefDescription": "Load operations that miss the first DTLB level but hit the second and do not cause page walks",
        "Counter": "0,1,2,3",
        "EventCode": "0x5F",
        "EventName": "DTLB_LOAD_MISSES.STLB_HIT",
        "PublicDescription": "Counts load operations that missed 1st level DTLB but hit the 2nd level.",
        "SampleAfterValue": "100003",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes of any page size.",
        "Counter": "0,1,2,3",
        "EventCode": "0x08",
        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
        "PublicDescription": "Misses in all TLB levels that caused page walk completed of any size by demand loads.",
        "SampleAfterValue": "100003",
        "UMask": "0x82"
    },
    {
        "BriefDescription": "Demand load cycles page miss handler (PMH) is busy with this walk.",
        "Counter": "0,1,2,3",
        "EventCode": "0x08",
        "EventName": "DTLB_LOAD_MISSES.WALK_DURATION",
        "PublicDescription": "Cycle PMH is busy with a walk due to demand loads.",
        "SampleAfterValue": "2000003",
        "UMask": "0x84"
    },
    {
        "BriefDescription": "Store misses in all DTLB levels that cause page walks",
        "Counter": "0,1,2,3",
        "EventCode": "0x49",
        "EventName": "DTLB_STORE_MISSES.MISS_CAUSES_A_WALK",
        "PublicDescription": "Miss in all TLB levels causes a page walk of any page size (4K/2M/4M/1G).",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },

Annotation

Implementation Notes