tools/perf/pmu-events/arch/x86/knightslanding/frontend.json
Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/knightslanding/frontend.json
File Facts
- System
- Linux kernel
- Corpus path
tools/perf/pmu-events/arch/x86/knightslanding/frontend.json- Extension
.json- Size
- 2176 bytes
- Lines
- 59
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
[
{
"BriefDescription": "Counts the number of times the front end resteers for any branch as a result of another branch handling mechanism in the front end.",
"Counter": "0,1",
"EventCode": "0xE6",
"EventName": "BACLEARS.ALL",
"SampleAfterValue": "200003",
"UMask": "0x1"
},
{
"BriefDescription": "Counts the number of times the front end resteers for conditional branches as a result of another branch handling mechanism in the front end.",
"Counter": "0,1",
"EventCode": "0xE6",
"EventName": "BACLEARS.COND",
"SampleAfterValue": "200003",
"UMask": "0x10"
},
{
"BriefDescription": "Counts the number of times the front end resteers for RET branches as a result of another branch handling mechanism in the front end.",
"Counter": "0,1",
"EventCode": "0xE6",
"EventName": "BACLEARS.RETURN",
"SampleAfterValue": "200003",
"UMask": "0x8"
},
{
"BriefDescription": "Counts all instruction fetches, including uncacheable fetches.",
"Counter": "0,1",
"EventCode": "0x80",
"EventName": "ICACHE.ACCESSES",
"SampleAfterValue": "200003",
"UMask": "0x3"
},
{
"BriefDescription": "Counts all instruction fetches that hit the instruction cache.",
"Counter": "0,1",
"EventCode": "0x80",
"EventName": "ICACHE.HIT",
"SampleAfterValue": "200003",
"UMask": "0x1"
},
{
"BriefDescription": "Counts all instruction fetches that miss the instruction cache or produce memory requests. An instruction fetch miss is counted only once and not once for every cycle it is outstanding.",
"Counter": "0,1",
"EventCode": "0x80",
"EventName": "ICACHE.MISSES",
"SampleAfterValue": "200003",
"UMask": "0x2"
},
{
"BriefDescription": "Counts the number of times the MSROM starts a flow of uops.",
"Counter": "0,1",
"EventCode": "0xE7",
"EventName": "MS_DECODED.MS_ENTRY",
"SampleAfterValue": "200003",
"UMask": "0x1"
}
]
Annotation
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.