tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json
Extension
.json
Size
4372 bytes
Lines
121
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "BriefDescription": "Counts the number of read requests and streaming stores that hit in MCDRAM cache and the data in MCDRAM is clean with respect to DDR. This event is only valid in cache and hybrid memory mode.",
        "Counter": "0,1,2,3",
        "EventCode": "0x02",
        "EventName": "UNC_E_EDC_ACCESS.HIT_CLEAN",
        "PerPkg": "1",
        "UMask": "0x1",
        "Unit": "EDC_UCLK"
    },
    {
        "BriefDescription": "Counts the number of read requests and streaming stores that hit in MCDRAM cache and the data in MCDRAM is dirty with respect to DDR. This event is only valid in cache and hybrid memory mode.",
        "Counter": "0,1,2,3",
        "EventCode": "0x02",
        "EventName": "UNC_E_EDC_ACCESS.HIT_DIRTY",
        "PerPkg": "1",
        "UMask": "0x2",
        "Unit": "EDC_UCLK"
    },
    {
        "BriefDescription": "Counts the number of read requests and streaming stores that miss in MCDRAM cache and the data evicted from the MCDRAM is clean with respect to DDR. This event is only valid in cache and hybrid memory mode.",
        "Counter": "0,1,2,3",
        "EventCode": "0x02",
        "EventName": "UNC_E_EDC_ACCESS.MISS_CLEAN",
        "PerPkg": "1",
        "UMask": "0x4",
        "Unit": "EDC_UCLK"
    },
    {
        "BriefDescription": "Counts the number of read requests and streaming stores that miss in MCDRAM cache and the data evicted from the MCDRAM is dirty with respect to DDR. This event is only valid in cache and hybrid memory mode.",
        "Counter": "0,1,2,3",
        "EventCode": "0x02",
        "EventName": "UNC_E_EDC_ACCESS.MISS_DIRTY",
        "PerPkg": "1",
        "UMask": "0x8",
        "Unit": "EDC_UCLK"
    },
    {
        "BriefDescription": "Number of EDC Hits or Misses. Miss I",
        "Counter": "0,1,2,3",
        "EventCode": "0x02",
        "EventName": "UNC_E_EDC_ACCESS.MISS_INVALID",
        "PerPkg": "1",
        "UMask": "0x10",
        "Unit": "EDC_UCLK"
    },
    {
        "BriefDescription": "ECLK count",
        "Counter": "0,1,2,3",
        "EventName": "UNC_E_E_CLOCKTICKS",
        "PerPkg": "1",
        "Unit": "EDC_ECLK"
    },
    {
        "BriefDescription": "Counts the number of read requests received by the MCDRAM controller. This event is valid in all three memory modes: flat, cache and hybrid. In cache and hybrid memory mode, this event counts all read requests as well as streaming stores that hit or miss in the MCDRAM cache.",
        "Counter": "0,1,2,3",
        "EventCode": "0x01",
        "EventName": "UNC_E_RPQ_INSERTS",
        "PerPkg": "1",
        "UMask": "0x1",
        "Unit": "EDC_ECLK"
    },
    {
        "BriefDescription": "UCLK count",
        "Counter": "0,1,2,3",
        "EventName": "UNC_E_U_CLOCKTICKS",
        "PerPkg": "1",
        "Unit": "EDC_UCLK"
    },
    {

Annotation

Implementation Notes