tools/perf/pmu-events/arch/x86/sandybridge/cache.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/sandybridge/cache.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/sandybridge/cache.json
Extension
.json
Size
65888 bytes
Lines
1612
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "BriefDescription": "Allocated L1D data cache lines in M state.",
        "Counter": "0,1,2,3",
        "EventCode": "0x51",
        "EventName": "L1D.ALLOCATED_IN_M",
        "SampleAfterValue": "2000003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "Cache lines in M state evicted out of L1D due to Snoop HitM or dirty line replacement.",
        "Counter": "0,1,2,3",
        "EventCode": "0x51",
        "EventName": "L1D.ALL_M_REPLACEMENT",
        "SampleAfterValue": "2000003",
        "UMask": "0x8"
    },
    {
        "BriefDescription": "L1D data cache lines in M state evicted due to replacement.",
        "Counter": "0,1,2,3",
        "EventCode": "0x51",
        "EventName": "L1D.EVICTION",
        "SampleAfterValue": "2000003",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "L1D data line replacements.",
        "Counter": "0,1,2,3",
        "EventCode": "0x51",
        "EventName": "L1D.REPLACEMENT",
        "PublicDescription": "This event counts L1D data line replacements.  Replacements occur when a new line is brought into the cache, causing eviction of a line loaded earlier.",
        "SampleAfterValue": "2000003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Cycles when dispatched loads are cancelled due to L1D bank conflicts with other load ports.",
        "Counter": "0,1,2,3",
        "CounterMask": "1",
        "EventCode": "0xBF",
        "EventName": "L1D_BLOCKS.BANK_CONFLICT_CYCLES",
        "SampleAfterValue": "100003",
        "UMask": "0x5"
    },
    {
        "BriefDescription": "Cycles a demand request was blocked due to Fill Buffers unavailability.",
        "Counter": "0,1,2,3",
        "CounterMask": "1",
        "EventCode": "0x48",
        "EventName": "L1D_PEND_MISS.FB_FULL",
        "SampleAfterValue": "2000003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "L1D miss outstanding duration in cycles.",
        "Counter": "2",
        "EventCode": "0x48",
        "EventName": "L1D_PEND_MISS.PENDING",
        "SampleAfterValue": "2000003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Cycles with L1D load Misses outstanding.",
        "Counter": "2",
        "CounterMask": "1",
        "EventCode": "0x48",
        "EventName": "L1D_PEND_MISS.PENDING_CYCLES",
        "SampleAfterValue": "2000003",
        "UMask": "0x1"
    },
    {

Annotation

Implementation Notes