tools/perf/pmu-events/arch/x86/sandybridge/virtual-memory.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/sandybridge/virtual-memory.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/sandybridge/virtual-memory.json
Extension
.json
Size
5013 bytes
Lines
134
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "BriefDescription": "Load misses in all DTLB levels that cause page walks.",
        "Counter": "0,1,2,3",
        "EventCode": "0x08",
        "EventName": "DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
        "Counter": "0,1,2,3",
        "EventCode": "0x08",
        "EventName": "DTLB_LOAD_MISSES.STLB_HIT",
        "PublicDescription": "This event counts load operations that miss the first DTLB level but hit the second and do not cause any page walks. The penalty in this case is approximately 7 cycles.",
        "SampleAfterValue": "100003",
        "UMask": "0x10"
    },
    {
        "BriefDescription": "Load misses at all DTLB levels that cause completed page walks.",
        "Counter": "0,1,2,3",
        "EventCode": "0x08",
        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
        "SampleAfterValue": "100003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "Cycles when PMH is busy with page walks.",
        "Counter": "0,1,2,3",
        "EventCode": "0x08",
        "EventName": "DTLB_LOAD_MISSES.WALK_DURATION",
        "PublicDescription": "This event counts cycles when the  page miss handler (PMH) is servicing page walks caused by DTLB load misses.",
        "SampleAfterValue": "2000003",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "Store misses in all DTLB levels that cause page walks.",
        "Counter": "0,1,2,3",
        "EventCode": "0x49",
        "EventName": "DTLB_STORE_MISSES.MISS_CAUSES_A_WALK",
        "SampleAfterValue": "100003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Store operations that miss the first TLB level but hit the second and do not cause page walks.",
        "Counter": "0,1,2,3",
        "EventCode": "0x49",
        "EventName": "DTLB_STORE_MISSES.STLB_HIT",
        "SampleAfterValue": "100003",
        "UMask": "0x10"
    },
    {
        "BriefDescription": "Store misses in all DTLB levels that cause completed page walks.",
        "Counter": "0,1,2,3",
        "EventCode": "0x49",
        "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",
        "SampleAfterValue": "100003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "Cycles when PMH is busy with page walks.",
        "Counter": "0,1,2,3",
        "EventCode": "0x49",
        "EventName": "DTLB_STORE_MISSES.WALK_DURATION",
        "SampleAfterValue": "2000003",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "Cycle count for an Extended Page table walk.  The Extended Page Directory cache is used by Virtual Machine operating systems while the guest operating systems use the standard TLB caches.",
        "Counter": "0,1,2,3",

Annotation

Implementation Notes