tools/perf/pmu-events/arch/x86/sierraforest/cache.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/sierraforest/cache.json

File Facts

System
Linux kernel
Corpus path
tools/perf/pmu-events/arch/x86/sierraforest/cache.json
Extension
.json
Size
25599 bytes
Lines
574
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

[
    {
        "BriefDescription": "Counts the number of L1D cacheline (dirty) evictions caused by load misses, stores, and prefetches.",
        "Counter": "0,1,2,3,4,5,6,7",
        "EventCode": "0x51",
        "EventName": "DL1.DIRTY_EVICTION",
        "PublicDescription": "Counts the number of L1D cacheline (dirty) evictions caused by load misses, stores, and prefetches.  Does not count evictions or dirty writebacks caused by snoops.  Does not count a replacement unless a (dirty) line was written back.",
        "SampleAfterValue": "200003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Exclusive state",
        "Counter": "0,1,2,3,4,5,6,7",
        "EventCode": "0x25",
        "EventName": "L2_LINES_IN.E",
        "PublicDescription": "Counts the number of cache lines filled into the L2 cache that are in Exclusive state. Counts on a per core basis.",
        "SampleAfterValue": "1000003",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Forward state",
        "Counter": "0,1,2,3,4,5,6,7",
        "EventCode": "0x25",
        "EventName": "L2_LINES_IN.F",
        "PublicDescription": "Counts the number of cache lines filled into the L2 cache that are in Forward state. Counts on a per core basis.",
        "SampleAfterValue": "1000003",
        "UMask": "0x10"
    },
    {
        "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Modified state",
        "Counter": "0,1,2,3,4,5,6,7",
        "EventCode": "0x25",
        "EventName": "L2_LINES_IN.M",
        "PublicDescription": "Counts the number of cache lines filled into the L2 cache that are in Modified state. Counts on a per core basis.",
        "SampleAfterValue": "1000003",
        "UMask": "0x8"
    },
    {
        "BriefDescription": "Counts the number of cache lines filled into the L2 cache that are in Shared state",
        "Counter": "0,1,2,3,4,5,6,7",
        "EventCode": "0x25",
        "EventName": "L2_LINES_IN.S",
        "PublicDescription": "Counts the number of cache lines filled into the L2 cache that are in Shared state. Counts on a per core basis.",
        "SampleAfterValue": "1000003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "Counts the number of L2 cache lines that are evicted due to an L2 cache fill",
        "Counter": "0,1,2,3,4,5,6,7",
        "EventCode": "0x26",
        "EventName": "L2_LINES_OUT.NON_SILENT",
        "PublicDescription": "Counts the number of L2 cache lines that are evicted due to an L2 cache fill. Increments on the core that brought the line in originally.",
        "SampleAfterValue": "1000003",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "Counts the number of L2 cache lines that are silently dropped due to an L2 cache fill",
        "Counter": "0,1,2,3,4,5,6,7",
        "EventCode": "0x26",
        "EventName": "L2_LINES_OUT.SILENT",
        "PublicDescription": "Counts the number of L2 cache lines that are silently dropped due to an L2 cache fill.  Increments on the core that brought the line in originally.",
        "SampleAfterValue": "1000003",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "Counts the number of L2 Cache Accesses that resulted in a Hit from a front door request only (does not include rejects or recycles), per core event",
        "Counter": "0,1,2,3,4,5,6,7",
        "EventCode": "0x24",
        "EventName": "L2_REQUEST.HIT",
        "SampleAfterValue": "200003",

Annotation

Implementation Notes