tools/perf/pmu-events/arch/x86/silvermont/pipeline.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/silvermont/pipeline.json

File Facts

System: Linux kernel
Corpus path: tools/perf/pmu-events/arch/x86/silvermont/pipeline.json
Extension: .json
Size: 28936 bytes
Lines: 316
Domain: Support Tooling And Documentation
Bucket: tools
Inferred role: Support Tooling And Documentation: configuration, schema, or hardware description
Status: atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

[
    {
        "BriefDescription": "Counts the number of branch instructions retired...",
        "Counter": "0,1",
        "EventCode": "0xC4",
        "EventName": "BR_INST_RETIRED.ALL_BRANCHES",
        "PEBS": "1",
        "PublicDescription": "ALL_BRANCHES counts the number of any branch instructions retired.  Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns.",
        "SampleAfterValue": "200003"
    },
    {
        "BriefDescription": "Counts the number of taken branch instructions retired",
        "Counter": "0,1",
        "EventCode": "0xC4",
        "EventName": "BR_INST_RETIRED.ALL_TAKEN_BRANCHES",
        "PEBS": "2",
        "PublicDescription": "ALL_TAKEN_BRANCHES counts the number of all taken branch instructions retired.  Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns.",
        "SampleAfterValue": "200003",
        "UMask": "0x80"
    },
    {
        "BriefDescription": "Counts the number of near CALL branch instructions retired",
        "Counter": "0,1",
        "EventCode": "0xC4",
        "EventName": "BR_INST_RETIRED.CALL",
        "PEBS": "1",
        "PublicDescription": "CALL counts the number of near CALL branch instructions retired.  Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns.",
        "SampleAfterValue": "200003",
        "UMask": "0xf9"
    },
    {
        "BriefDescription": "Counts the number of far branch instructions retired",
        "Counter": "0,1",
        "EventCode": "0xC4",
        "EventName": "BR_INST_RETIRED.FAR_BRANCH",
        "PEBS": "1",
        "PublicDescription": "FAR counts the number of far branch instructions retired.  Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns.",
        "SampleAfterValue": "200003",
        "UMask": "0xbf"
    },
    {
        "BriefDescription": "Counts the number of near indirect CALL branch instructions retired",
        "Counter": "0,1",
        "EventCode": "0xC4",
        "EventName": "BR_INST_RETIRED.IND_CALL",
        "PEBS": "1",
        "PublicDescription": "IND_CALL counts the number of near indirect CALL branch instructions retired.  Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns.",
        "SampleAfterValue": "200003",
        "UMask": "0xfb"
    },
    {
        "BriefDescription": "Counts the number of JCC branch instructions retired",
        "Counter": "0,1",
        "EventCode": "0xC4",
        "EventName": "BR_INST_RETIRED.JCC",
        "PEBS": "1",
        "PublicDescription": "JCC counts the number of conditional branch (JCC) instructions retired. Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns.",
        "SampleAfterValue": "200003",
        "UMask": "0x7e"
    },
    {
        "BriefDescription": "Counts the number of near indirect JMP and near indirect CALL branch instructions retired",
        "Counter": "0,1",
        "EventCode": "0xC4",
        "EventName": "BR_INST_RETIRED.NON_RETURN_IND",
        "PEBS": "1",
        "PublicDescription": "NON_RETURN_IND counts the number of near indirect JMP and near indirect CALL branch instructions retired.  Branch prediction predicts the branch target and enables the processor to begin executing instructions long before the branch true execution path is known. All branches utilize the branch prediction unit (BPU) for prediction. This unit predicts the target address not only based on the EIP of the branch but also based on the execution path through which execution reached this EIP. The BPU can efficiently predict the following branch types: conditional branches, direct calls and jumps, indirect calls and jumps, returns.",
        "SampleAfterValue": "200003",
        "UMask": "0xeb"
    },

Annotation

Atlas domain: Support Tooling And Documentation / tools.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.