tools/perf/pmu-events/arch/x86/westmereep-dp/memory.json

Source file repositories/reference/linux-study-clean/tools/perf/pmu-events/arch/x86/westmereep-dp/memory.json

File Facts

System: Linux kernel
Corpus path: tools/perf/pmu-events/arch/x86/westmereep-dp/memory.json
Extension: .json
Size: 24337 bytes
Lines: 691
Domain: Support Tooling And Documentation
Bucket: tools
Inferred role: Support Tooling And Documentation: configuration, schema, or hardware description
Status: atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

[
    {
        "BriefDescription": "Misaligned store references",
        "Counter": "0,1,2,3",
        "EventCode": "0x5",
        "EventName": "MISALIGN_MEM_REF.STORE",
        "SampleAfterValue": "200000",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = ANY_DRAM AND REMOTE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OFFCORE_RESPONSE.ANY_DATA.ANY_DRAM_AND_REMOTE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3011",
        "SampleAfterValue": "100000",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = ANY_LLC_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OFFCORE_RESPONSE.ANY_DATA.ANY_LLC_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0xf811",
        "SampleAfterValue": "100000",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = OTHER_LOCAL_DRAM",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OFFCORE_RESPONSE.ANY_DATA.OTHER_LOCAL_DRAM",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x4011",
        "SampleAfterValue": "100000",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = REMOTE_DRAM",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OFFCORE_RESPONSE.ANY_DATA.REMOTE_DRAM",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x2011",
        "SampleAfterValue": "100000",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = ANY_DRAM AND REMOTE_FWD",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.ANY_DRAM_AND_REMOTE_FWD",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0x3044",
        "SampleAfterValue": "100000",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = ANY_LLC_MISS",
        "Counter": "0,1,2,3",
        "EventCode": "0xB7, 0xBB",
        "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.ANY_LLC_MISS",
        "MSRIndex": "0x1a6,0x1a7",
        "MSRValue": "0xf844",
        "SampleAfterValue": "100000",
        "UMask": "0x1"
    },
    {

Annotation

Atlas domain: Support Tooling And Documentation / tools.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.