tools/perf/pmu-events/arch/x86/westmereex/virtual-memory.json

File Facts

System

Linux kernel

Corpus path

tools/perf/pmu-events/arch/x86/westmereex/virtual-memory.json

Extension

.json

Size

5475 bytes

Lines

182

Domain

Support Tooling And Documentation

Bucket

tools

Inferred role

Support Tooling And Documentation: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

• Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

[
    {
        "BriefDescription": "DTLB load misses",
        "Counter": "0,1,2,3",
        "EventCode": "0x8",
        "EventName": "DTLB_LOAD_MISSES.ANY",
        "SampleAfterValue": "200000",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "DTLB load miss large page walks",
        "Counter": "0,1,2,3",
        "EventCode": "0x8",
        "EventName": "DTLB_LOAD_MISSES.LARGE_WALK_COMPLETED",
        "SampleAfterValue": "200000",
        "UMask": "0x80"
    },
    {
        "BriefDescription": "DTLB load miss caused by low part of address",
        "Counter": "0,1,2,3",
        "EventCode": "0x8",
        "EventName": "DTLB_LOAD_MISSES.PDE_MISS",
        "SampleAfterValue": "200000",
        "UMask": "0x20"
    },
    {
        "BriefDescription": "DTLB second level hit",
        "Counter": "0,1,2,3",
        "EventCode": "0x8",
        "EventName": "DTLB_LOAD_MISSES.STLB_HIT",
        "SampleAfterValue": "2000000",
        "UMask": "0x10"
    },
    {
        "BriefDescription": "DTLB load miss page walks complete",
        "Counter": "0,1,2,3",
        "EventCode": "0x8",
        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
        "SampleAfterValue": "200000",
        "UMask": "0x2"
    },
    {
        "BriefDescription": "DTLB load miss page walk cycles",
        "Counter": "0,1,2,3",
        "EventCode": "0x8",
        "EventName": "DTLB_LOAD_MISSES.WALK_CYCLES",
        "SampleAfterValue": "200000",
        "UMask": "0x4"
    },
    {
        "BriefDescription": "DTLB misses",
        "Counter": "0,1,2,3",
        "EventCode": "0x49",
        "EventName": "DTLB_MISSES.ANY",
        "SampleAfterValue": "200000",
        "UMask": "0x1"
    },
    {
        "BriefDescription": "DTLB miss large page walks",
        "Counter": "0,1,2,3",
        "EventCode": "0x49",
        "EventName": "DTLB_MISSES.LARGE_WALK_COMPLETED",
        "SampleAfterValue": "200000",
        "UMask": "0x80"
    },
    {
        "BriefDescription": "DTLB misses caused by low part of address. Count also includes 2M page references because 2M pages do not use the PDE.",
        "Counter": "0,1,2,3",
        "EventCode": "0x49",
        "EventName": "DTLB_MISSES.PDE_MISS",

Annotation

• Atlas domain: Support Tooling And Documentation / tools.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.