tools/perf/util/amd-sample-raw.c
Source file repositories/reference/linux-study-clean/tools/perf/util/amd-sample-raw.c
File Facts
- System
- Linux kernel
- Corpus path
tools/perf/util/amd-sample-raw.c- Extension
.c- Size
- 12591 bytes
- Lines
- 391
- Domain
- Support Tooling And Documentation
- Bucket
- tools
- Inferred role
- Support Tooling And Documentation: implementation source
- Status
- source implementation candidate
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
unistd.hstdio.hstring.hinttypes.hlinux/string.h../../arch/x86/include/asm/amd/ibs.hdebug.hsession.hevlist.hsample-raw.hutil/sample.h
Detected Declarations
function pr_ibs_fetch_ctlfunction pr_ic_ibs_extd_ctlfunction pr_ibs_op_ctlfunction pr_ibs_op_datafunction pr_ibs_op_data2_extendedfunction pr_ibs_op_data2_defaultfunction pr_ibs_op_data2function pr_ibs_op_data3function OpDcMissOpenMemReqsfunction amd_dump_ibs_opfunction amd_dump_ibs_fetchfunction is_valid_ibs_fetch_samplefunction is_valid_ibs_op_samplefunction evlist__amd_sample_rawfunction parse_cpuidfunction evlist__has_amd_ibs
Annotated Snippet
if (reg.dc_phy_addr_valid) {
int idx = (reg.dc_l1tlb_hit_1g << 1) | reg.dc_l1tlb_hit_2m;
snprintf(dc_l1_l2tlb_miss_str, sizeof(dc_l1_l2tlb_miss_str),
" DcL1TlbMiss %d DcL2TlbMiss %d",
reg.dc_l1tlb_miss, reg.dc_l2tlb_miss);
snprintf(dc_page_size_str, sizeof(dc_page_size_str),
" DcPageSize %4s", dc_page_sizes[idx]);
}
} else {
snprintf(dc_l1_l2tlb_miss_str, sizeof(dc_l1_l2tlb_miss_str),
" DcL1TlbMiss %d DcL2TlbMiss %d",
reg.dc_l1tlb_miss, reg.dc_l2tlb_miss);
snprintf(dc_l1tlb_hit_str, sizeof(dc_l1tlb_hit_str),
" DcL1TlbHit2M %d DcL1TlbHit1G %d",
reg.dc_l1tlb_hit_2m, reg.dc_l1tlb_hit_1g);
snprintf(dc_l2tlb_hit_2m_str, sizeof(dc_l2tlb_hit_2m_str),
" DcL2TlbHit2M %d", reg.dc_l2tlb_hit_2m);
snprintf(dc_l2tlb_hit_1g_str, sizeof(dc_l2tlb_hit_1g_str),
" DcL2TlbHit1G %d", reg.dc_l2_tlb_hit_1g);
}
printf("ibs_op_data3:\t%016llx LdOp %d StOp %d%s%s%s DcMiss %d DcMisAcc %d "
"DcWcMemAcc %d DcUcMemAcc %d DcLockedOp %d DcMissNoMabAlloc %d "
"DcLinAddrValid %d DcPhyAddrValid %d%s%s SwPf %d%s%s "
"DcMissLat %5d TlbRefillLat %5d\n",
reg.val, reg.ld_op, reg.st_op, dc_l1_l2tlb_miss_str,
dtlb_pgsize_cap ? dc_page_size_str : dc_l1tlb_hit_str,
dc_l2tlb_hit_2m_str, reg.dc_miss, reg.dc_mis_acc, reg.dc_wc_mem_acc,
reg.dc_uc_mem_acc, reg.dc_locked_op, reg.dc_miss_no_mab_alloc,
reg.dc_lin_addr_valid, reg.dc_phy_addr_valid, dc_l2tlb_hit_1g_str,
l2_miss_str, reg.sw_pf, op_mem_width_str, op_dc_miss_open_mem_reqs_str,
reg.dc_miss_lat, reg.tlb_refill_lat);
}
/*
* IBS Op/Execution MSRs always saved, in order, are:
* IBS_OP_CTL, IBS_OP_RIP, IBS_OP_DATA, IBS_OP_DATA2,
* IBS_OP_DATA3, IBS_DC_LINADDR, IBS_DC_PHYSADDR, BP_IBSTGT_RIP
*/
static void amd_dump_ibs_op(struct perf_sample *sample)
{
struct perf_ibs_data *data = sample->raw_data;
union ibs_op_ctl *op_ctl = (union ibs_op_ctl *)data->data;
__u64 *rip = (__u64 *)op_ctl + 1;
union ibs_op_data *op_data = (union ibs_op_data *)(rip + 1);
union ibs_op_data3 *op_data3 = (union ibs_op_data3 *)(rip + 3);
pr_ibs_op_ctl(*op_ctl);
if (!op_data->op_rip_invalid)
printf("IbsOpRip:\t%016llx\n", *rip);
pr_ibs_op_data(*op_data);
/*
* Erratum #1293: ignore op_data2 if DcMissNoMabAlloc or SwPf are set
*/
if (!(cpu_family == 0x19 && cpu_model < 0x10 &&
(op_data3->dc_miss_no_mab_alloc || op_data3->sw_pf)))
pr_ibs_op_data2(*(union ibs_op_data2 *)(rip + 2));
pr_ibs_op_data3(*op_data3);
if (op_data3->dc_lin_addr_valid)
printf("IbsDCLinAd:\t%016llx\n", *(rip + 4));
if (op_data3->dc_phy_addr_valid)
printf("IbsDCPhysAd:\t%016llx\n", *(rip + 5));
if (op_data->op_brn_ret && *(rip + 6))
printf("IbsBrTarget:\t%016llx\n", *(rip + 6));
}
/*
* IBS Fetch MSRs always saved, in order, are:
* IBS_FETCH_CTL, IBS_FETCH_LINADDR, IBS_FETCH_PHYSADDR, IC_IBS_EXTD_CTL
*/
static void amd_dump_ibs_fetch(struct perf_sample *sample)
{
struct perf_ibs_data *data = sample->raw_data;
union ibs_fetch_ctl *fetch_ctl = (union ibs_fetch_ctl *)data->data;
__u64 *addr = (__u64 *)fetch_ctl + 1;
union ic_ibs_extd_ctl *extd_ctl = (union ic_ibs_extd_ctl *)addr + 2;
pr_ibs_fetch_ctl(*fetch_ctl);
printf("IbsFetchLinAd:\t%016llx\n", *addr++);
if (fetch_ctl->phy_addr_valid)
printf("IbsFetchPhysAd:\t%016llx\n", *addr);
pr_ic_ibs_extd_ctl(*extd_ctl);
}
/*
* Test for enable and valid bits in captured control MSRs.
*/
static bool is_valid_ibs_fetch_sample(struct perf_sample *sample)
{
Annotation
- Immediate include surface: `unistd.h`, `stdio.h`, `string.h`, `inttypes.h`, `linux/string.h`, `../../arch/x86/include/asm/amd/ibs.h`, `debug.h`, `session.h`.
- Detected declarations: `function pr_ibs_fetch_ctl`, `function pr_ic_ibs_extd_ctl`, `function pr_ibs_op_ctl`, `function pr_ibs_op_data`, `function pr_ibs_op_data2_extended`, `function pr_ibs_op_data2_default`, `function pr_ibs_op_data2`, `function pr_ibs_op_data3`, `function OpDcMissOpenMemReqs`, `function amd_dump_ibs_op`.
- Atlas domain: Support Tooling And Documentation / tools.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.