tools/testing/selftests/kvm/arm64/aarch32_id_regs.c

Source file repositories/reference/linux-study-clean/tools/testing/selftests/kvm/arm64/aarch32_id_regs.c

File Facts

System
Linux kernel
Corpus path
tools/testing/selftests/kvm/arm64/aarch32_id_regs.c
Extension
.c
Size
4170 bytes
Lines
168
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: implementation source
Status
source implementation candidate

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * aarch32_id_regs - Test for ID register behavior on AArch64-only systems
 *
 * Copyright (c) 2022 Google LLC.
 *
 * Test that KVM handles the AArch64 views of the AArch32 ID registers as RAZ
 * and WI from userspace.
 */

#include <stdint.h>

#include "kvm_util.h"
#include "processor.h"
#include "test_util.h"
#include <linux/bitfield.h>

#define BAD_ID_REG_VAL	0x1badc0deul

#define GUEST_ASSERT_REG_RAZ(reg)	GUEST_ASSERT_EQ(read_sysreg_s(reg), 0)

static void guest_main(void)
{
	GUEST_ASSERT_REG_RAZ(SYS_ID_PFR0_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_PFR1_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_DFR0_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_AFR0_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_MMFR0_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_MMFR1_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_MMFR2_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_MMFR3_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_ISAR0_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_ISAR1_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_ISAR2_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_ISAR3_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_ISAR4_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_ISAR5_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_MMFR4_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_ISAR6_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_MVFR0_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_MVFR1_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_MVFR2_EL1);
	GUEST_ASSERT_REG_RAZ(sys_reg(3, 0, 0, 3, 3));
	GUEST_ASSERT_REG_RAZ(SYS_ID_PFR2_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_DFR1_EL1);
	GUEST_ASSERT_REG_RAZ(SYS_ID_MMFR5_EL1);
	GUEST_ASSERT_REG_RAZ(sys_reg(3, 0, 0, 3, 7));

	GUEST_DONE();
}

static void test_guest_raz(struct kvm_vcpu *vcpu)
{
	struct ucall uc;

	vcpu_run(vcpu);

	switch (get_ucall(vcpu, &uc)) {
	case UCALL_ABORT:
		REPORT_GUEST_ASSERT(uc);
		break;
	case UCALL_DONE:
		break;
	default:
		TEST_FAIL("Unexpected ucall: %lu", uc.cmd);
	}
}

static u64 raz_wi_reg_ids[] = {
	KVM_ARM64_SYS_REG(SYS_ID_PFR0_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_PFR1_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_DFR0_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_MMFR0_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_MMFR1_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_MMFR2_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_MMFR3_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_ISAR0_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_ISAR1_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_ISAR2_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_ISAR3_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_ISAR4_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_ISAR5_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_MMFR4_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_ISAR6_EL1),
	KVM_ARM64_SYS_REG(SYS_MVFR0_EL1),
	KVM_ARM64_SYS_REG(SYS_MVFR1_EL1),
	KVM_ARM64_SYS_REG(SYS_MVFR2_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_PFR2_EL1),
	KVM_ARM64_SYS_REG(SYS_ID_MMFR5_EL1),
};

Annotation

Implementation Notes