tools/testing/selftests/kvm/x86/set_sregs_test.c

Source file repositories/reference/linux-study-clean/tools/testing/selftests/kvm/x86/set_sregs_test.c

File Facts

System
Linux kernel
Corpus path
tools/testing/selftests/kvm/x86/set_sregs_test.c
Extension
.c
Size
4738 bytes
Lines
159
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: implementation source
Status
source implementation candidate

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * KVM_SET_SREGS tests
 *
 * Copyright (C) 2018, Google LLC.
 *
 * This is a regression test for the bug fixed by the following commit:
 * d3802286fa0f ("kvm: x86: Disallow illegal IA32_APIC_BASE MSR values")
 *
 * That bug allowed a user-mode program that called the KVM_SET_SREGS
 * ioctl to put a VCPU's local APIC into an invalid state.
 */
#include <fcntl.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/ioctl.h>

#include "test_util.h"

#include "kvm_util.h"
#include "processor.h"

#define TEST_INVALID_CR_BIT(vcpu, cr, orig, bit)				\
do {										\
	struct kvm_sregs new;							\
	int rc;									\
										\
	/* Skip the sub-test, the feature/bit is supported. */			\
	if (orig.cr & bit)							\
		break;								\
										\
	memcpy(&new, &orig, sizeof(sregs));					\
	new.cr |= bit;								\
										\
	rc = _vcpu_sregs_set(vcpu, &new);					\
	TEST_ASSERT(rc, "KVM allowed invalid " #cr " bit (0x%lx)", bit);	\
										\
	/* Sanity check that KVM didn't change anything. */			\
	vcpu_sregs_get(vcpu, &new);						\
	TEST_ASSERT(!memcmp(&new, &orig, sizeof(new)), "KVM modified sregs");	\
} while (0)

#define KVM_ALWAYS_ALLOWED_CR4 (X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD |	\
				X86_CR4_DE | X86_CR4_PSE | X86_CR4_PAE |	\
				X86_CR4_MCE | X86_CR4_PGE | X86_CR4_PCE |	\
				X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT)

static u64 calc_supported_cr4_feature_bits(void)
{
	u64 cr4 = KVM_ALWAYS_ALLOWED_CR4;

	if (kvm_cpu_has(X86_FEATURE_UMIP))
		cr4 |= X86_CR4_UMIP;
	if (kvm_cpu_has(X86_FEATURE_LA57))
		cr4 |= X86_CR4_LA57;
	if (kvm_cpu_has(X86_FEATURE_VMX))
		cr4 |= X86_CR4_VMXE;
	if (kvm_cpu_has(X86_FEATURE_SMX))
		cr4 |= X86_CR4_SMXE;
	if (kvm_cpu_has(X86_FEATURE_FSGSBASE))
		cr4 |= X86_CR4_FSGSBASE;
	if (kvm_cpu_has(X86_FEATURE_PCID))
		cr4 |= X86_CR4_PCIDE;
	if (kvm_cpu_has(X86_FEATURE_XSAVE))
		cr4 |= X86_CR4_OSXSAVE;
	if (kvm_cpu_has(X86_FEATURE_SMEP))
		cr4 |= X86_CR4_SMEP;
	if (kvm_cpu_has(X86_FEATURE_SMAP))
		cr4 |= X86_CR4_SMAP;
	if (kvm_cpu_has(X86_FEATURE_PKU))
		cr4 |= X86_CR4_PKE;

	return cr4;
}

static void test_cr_bits(struct kvm_vcpu *vcpu, u64 cr4)
{
	struct kvm_sregs sregs;
	int rc, i;

	vcpu_sregs_get(vcpu, &sregs);
	sregs.cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
	sregs.cr4 |= cr4;
	rc = _vcpu_sregs_set(vcpu, &sregs);
	TEST_ASSERT(!rc, "Failed to set supported CR4 bits (0x%lx)", cr4);

	TEST_ASSERT(!!(sregs.cr4 & X86_CR4_OSXSAVE) ==
		    (vcpu->cpuid && vcpu_cpuid_has(vcpu, X86_FEATURE_OSXSAVE)),
		    "KVM didn't %s OSXSAVE in CPUID as expected",

Annotation

Implementation Notes