tools/testing/selftests/net/bench/page_pool/time_bench.h

Source file repositories/reference/linux-study-clean/tools/testing/selftests/net/bench/page_pool/time_bench.h

File Facts

System
Linux kernel
Corpus path
tools/testing/selftests/net/bench/page_pool/time_bench.h
Extension
.h
Size
7307 bytes
Lines
239
Domain
Support Tooling And Documentation
Bucket
tools
Inferred role
Support Tooling And Documentation: implementation source
Status
source implementation candidate

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

struct time_bench_record {
	uint32_t version_abi;
	uint32_t loops;		/* Requested loop invocations */
	uint32_t step;		/* option for e.g. bulk invocations */

	uint32_t flags;		/* Measurements types enabled */
#define TIME_BENCH_LOOP		BIT(0)
#define TIME_BENCH_TSC		BIT(1)
#define TIME_BENCH_WALLCLOCK	BIT(2)
#define TIME_BENCH_PMU		BIT(3)

	uint32_t cpu; /* Used when embedded in time_bench_cpu */

	/* Records */
	uint64_t invoked_cnt;	/* Returned actual invocations */
	uint64_t tsc_start;
	uint64_t tsc_stop;
	struct timespec64 ts_start;
	struct timespec64 ts_stop;
	/* PMU counters for instruction and cycles
	 * instructions counter including pipelined instructions
	 */
	uint64_t pmc_inst_start;
	uint64_t pmc_inst_stop;
	/* CPU unhalted clock counter */
	uint64_t pmc_clk_start;
	uint64_t pmc_clk_stop;

	/* Result records */
	uint64_t tsc_interval;
	uint64_t time_start, time_stop, time_interval; /* in nanosec */
	uint64_t pmc_inst, pmc_clk;

	/* Derived result records */
	uint64_t tsc_cycles; // +decimal?
	uint64_t ns_per_call_quotient, ns_per_call_decimal;
	uint64_t time_sec;
	uint32_t time_sec_remainder;
	uint64_t pmc_ipc_quotient, pmc_ipc_decimal; /* inst per cycle */
};

/* For synchronizing parallel CPUs to run concurrently */
struct time_bench_sync {
	atomic_t nr_tests_running;
	struct completion start_event;
};

/* Keep track of CPUs executing our bench function.
 *
 * Embed a time_bench_record for storing info per cpu
 */
struct time_bench_cpu {
	struct time_bench_record rec;
	struct time_bench_sync *sync; /* back ptr */
	struct task_struct *task;
	/* "data" opaque could have been placed in time_bench_sync,
	 * but to avoid any false sharing, place it per CPU
	 */
	void *data;
	/* Support masking outsome CPUs, mark if it ran */
	bool did_bench_run;
	/* int cpu; // note CPU stored in time_bench_record */
	int (*bench_func)(struct time_bench_record *record, void *data);
};

/*
 * Below TSC assembler code is not compatible with other archs, and
 * can also fail on guests if cpu-flags are not correct.
 *
 * The way TSC reading is used, many iterations, does not require as
 * high accuracy as described below (in Intel Doc #324264).
 *
 * Considering changing to use get_cycles() (#include <asm/timex.h>).
 */

/** TSC (Time-Stamp Counter) based **
 * Recommend reading, to understand details of reading TSC accurately:
 *  Intel Doc #324264, "How to Benchmark Code Execution Times on Intel"
 *
 * Consider getting exclusive ownership of CPU by using:
 *   unsigned long flags;
 *   preempt_disable();
 *   raw_local_irq_save(flags);
 *   _your_code_
 *   raw_local_irq_restore(flags);
 *   preempt_enable();
 *
 * Clobbered registers: "%rax", "%rbx", "%rcx", "%rdx"
 *  RDTSC only change "%rax" and "%rdx" but
 *  CPUID clears the high 32-bits of all (rax/rbx/rcx/rdx)

Annotation

Implementation Notes