tools/testing/selftests/powerpc/security/flush_utils.h

File Facts

System

Linux kernel

Corpus path

tools/testing/selftests/powerpc/security/flush_utils.h

Extension

.h

Size

638 bytes

Lines

25

Domain

Support Tooling And Documentation

Bucket

tools

Inferred role

Support Tooling And Documentation: implementation source

Status

source implementation candidate

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

• Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H
#define _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H

#define CACHELINE_SIZE 128

#define PERF_L1D_READ_MISS_CONFIG	((PERF_COUNT_HW_CACHE_L1D) | 		\
					(PERF_COUNT_HW_CACHE_OP_READ << 8) |	\
					(PERF_COUNT_HW_CACHE_RESULT_MISS << 16))

void syscall_loop(char *p, unsigned long iterations,
		  unsigned long zero_size);

void syscall_loop_uaccess(char *p, unsigned long iterations,
			  unsigned long zero_size);

void set_dscr(unsigned long val);

#endif /* _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H */

Annotation

• Atlas domain: Support Tooling And Documentation / tools.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.